smurf12345
New member
I looked around and haven't seen anybody post how to get root access to the Blink EVSE, so I thought I would share. It is pretty simple. I recommend to backup the SD Card just in case you screw something up. I used DD (Linux) to clone the SD card. I restored to a new SD card for playing around. Once you have a backup, modify the below files using a text editor from another machine that can read/write SD cards. *Modify at your own risk
Enable SSH Service
Change enable_ssh value from false to 'true'. This will also enable a rule in iptables to allow ssh.
Changing the root password
Add the below line to a script that runs with root privileges at boot. I used the firewall script and placed it towards the top.
Now, power cycle the Blink unit. SSH should be enabled and the root account should be changed to your new password. Once that is working, go back and remove the "echo root:newpassword | chpasswd" from firewall.sh
Some useful config files are in /CDI/etc and check out /linux_init file for the reading/writing info serial inputs/outputs.
Enable SSH Service
Change enable_ssh value from false to 'true'. This will also enable a rule in iptables to allow ssh.
Code:
# File: /CDI/etc/additionalsystemoptions.ini
enable_ssh=true
Add the below line to a script that runs with root privileges at boot. I used the firewall script and placed it towards the top.
Code:
# File: /CDI/bin/firewall.sh
echo root:newpassword | chpasswd
Some useful config files are in /CDI/etc and check out /linux_init file for the reading/writing info serial inputs/outputs.
Code:
File: /linux_init
GPIO devices
# Input Pins
/dev/blink_connected
/dev/blink_ready
/dev/blink_charging
/dev/blink_protection
/dev/blink_error
# Output Pins
/dev/blink_start
/dev/blink_stop
/dev/blink_enable
# Make energy meter nodes (Output Pins)
/dev/blink_meter_rx
/dev/blink_meter_tx
# Setup GPIO pins for j1772 control board
pxaregs GPDR2_95 0
pxaregs GPDR3_96 1
pxaregs GPDR3_97 1
pxaregs GPDR3_98 1
pxaregs GPDR3_99 0
pxaregs GPDR3_100 0
pxaregs GPDR3_101 0
pxaregs GPDR3_102 0